P3 VLSI Design Tools
Multi-million dollars have been invested to develop the following advanced IC design tools,
and the
opportunities for technology licensing
are available:
Hierarchical VLSI layout editor
(description)
Hierarchical and incremental design rule checker
(description)
Design rule compiler
(description)
Physical layout plotting program
(description)
Circuit extractor
(description)
Switch level simulator
Electrical Rules Checker
(description)
Netlist Comparator
(description)
PLA Design Tools
(description)
Please visit one of our reference sites:
Quadic
Screen photo for Design Rule Checker
Screen photo for VLSI layout editor
For initial consultation, please
contact us.
Please submit all questions and comments to
info@phase3.com