PLA Design Tools

bullet Generate PLAs from logic equations or truth table
bullet Minimization functions reduce number of product terms and propagation delay
bullet Produce layouts ready for fabrication
bullet Efficient conver sion algorithms allow moderate sized PLAs to be produced in minutes
The PLA Design Tools take you from product specification to physical layout in one step.

They allow you to create a MOS programmed logic array (PLA) either from a set of Boolean equations or from a truth table. The PLA tools consist of four programs: an equation to truth table translator; a product term minimization program; a product term sorting program (used to reduce propagation delay through the PLA); and a physical layout generator. These programs can be run separately or "piped" together in a single-step operation.


onceptually, a PLA is a regular structure of AND gates and OR gates that can be used to create two-level combinational logic. Any Boolean function can be implemented in this AND-OR structure. For example, PLAs can be used to create complex xombinational logic circuits, decoders, state machines, and counters, to name a few.


The most important benefit of the PLA Design Tools is their ability to speed up the VLSI design process. By allowing you to go from logic equations or thruth tables directly to a finished physical layout, you skip time-consuming and error-prone hand layout. Equally important, these tolls make it easy for you to modify your PLA designs. It is much easier to change a set of logic equations and rerun the PLA tools, than to change a mask layout by hand.


Besides facilitating the design of PLAs, the PLA Design Tools also allow you to optimize the PLA design itself. The product term minimizer reduces the size of a PLA; this decreases the area of the PLA and improves its performance. The delay minimization program further enhances the operation of the PLA by arranging product terms for minimum propagation delay through the circuit.


You can use the PLA tools to create small special purpose logic circuits, which can be included as cells in a larger design, or to create a large multi-function PLA with thousands of product terms. In both cases, the PLA generator program produces a physical layout cell that can be displayed using the Physical Layout Editor. You can then connect the PLA to other parts of the circuit.

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